JNTU Anantapur First Year MCA Syllabus 2009 |
Computer Organization |
UNIT – I : |
NUMBER SYSTEMS AND COMPUTER ARITHMETIC- Signed and unsigned numbers, Addition and subtraction, multiplication, division, Floating point representation, logical operation, Gray code, BCD codes, Error detecting codes, Boolean algebra, Simplification of Boolean expressions, K-Maps. COMBINATIONAL AND SEQUENTIAL CIRCUITS- decoders, Encoders, Multiplexers, Half and Full adders, Shift registers, Sequential circuits- flip-flops. |
UNIT – II : |
MEMORY ORGANIZATION-Memory hierarchy, Main memory-RAM, ROM chips, Memory address map, memory contention to CPU, Associative Memory-Hardware logic, match, read and write logic, Cache Memory-Associative mapping, Direct mapping, Set-associative mapping, hit and miss ratio.
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UNIT – III : |
MICRO PROGRAMMED CONTROL : Control memory, Address sequencing, microprogram example, design of control unit, Hard wired control, Microprogrammed control |
UNIT – IV : |
BASIC CPU ORGANIZATION-Introduction to CPU, Instruction formats-INTEL-8086 CPU architecture-Addressing modes - generation of physical address- code segment registers, Zero, one, two, and three address instructions.
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UNIT – V : |
INTEL 8086 ASSEMBLY LANGUAGE INSTRUCTIONS-Data transfer instructions-input- output instructions, address transfer, Flag transfer, arithmetic, logical, shift, and rotate instructions. Conditional and unconditional transfer, iteration control, interrupts and process control instructions, assembler directives, Programming with assembly language instructions.
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UNIT – VI : |
INPUT -OUTPUT ORGANIZATION-Peripheral devices, input-output interface-I/O Bus and interface modules, I/O versus Memory bus, isolated versus memory mapped I/O, Modes of transfer-Programmed I/O, Interrupt-initiated I/O, priority interrupts-Daisy chaining, parallel priority, interrupt cycle, DMA- DMA control, DMA transfer, Input output processor-CPU-IOP communication.
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UNIT – VII: |
PIPELINE AND VECTOR PROCESSING : Parallel Processing, Pipelining, Arithmetic Pipeline, Instruction Pipeline, RISC Pipeline, Vector Processing, Array Processors.
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UNIT – VIII : |
MULTI PROCESSORS : Characteristics of Multiprocessors, Interconnection Structures, Interprocessor Arbitration. InterProcessor Communication and Synchronization, Cache Coherance, Shared Memory Multiprocessors. |
REFERENCE |
TEXT BOOKS: |
1. Computer System Architecture, M. Morris Mano , 3rd Edition, PHI/Pearson Education,2008.
2. Microprocessors and Interfacing, Douglas Hall, Tata McGraw-Hill.
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Reference Books |
1. Computer Organization, Carl Hamacher, Zvonko Vranesic, Safwat Zaky, Vth Edition,
McGraw Hill.
2. Fundamentals of Computer Organization and Design, Sivarama P.Dandamudi ,Springer Int.
Edition.
3. Computer Organization and Architecture, William Stallings, 7th Edition, Pearson/PHI,2007.
4. Digital Design , M. Morris Mano, PHI/Pearson Education .
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